This invention relates, in general, to the manufacture of semiconductor devices, and more particularly, to the formation of field oxide on selected regions of a semiconductor device.
Integrated circuits are comprised of a number of devices interconnected on a single chip. The active areas of the devices are often separated or isolated from one another by either a thick field oxide or a deep trench. A field oxide or a trench is provided in order to prevent the formation of inversion layers between the devices. If inversion takes place i the field region, conducting channels between devices are formed, thus causing device failure. One way to avoid such inversion is to increase the threshold voltage in the field region by increasing the field oxide thickness. In addition, a further increase in threshold voltage can be obtained by doping the field region with an impurity type of the same conductivity as the silicon substrate or epitaxial layer. The field threshold dopant is implanted into the field region before the field oxide is grown.
The difficulty in growing thick oxide layers are well known. Lengthy oxidations, high temperatures, and a hard masking layer (such as polysilicon or silicon nitride) are required. The field oxide is usually grown by first providing a thin layer of oxide over the silicon material, then a layer of silicon nitride is deposited and etched, leaving openings in the non-active areas of a circuit where the field oxide is desired. The growth rate of oxide on silicon nitride is much slower than on oxide or silicon, thus the silicon nitride acts as a mask. One of the disadvantages of using silicon nitride is that it may cause contamination of the surface of the semiconductor layer, which in turn may cause circuit failure.
The growth of the field oxide can take as long as fifteen hours, thus increasing the cycle time of the production process. Another problem that exists is that the oxide tends to grow underneath the edges of the silicon nitride mask. This oxide growth forms an unfavorable topography which resemble a "bird's beak". The resultant topography is undesirable because it encroaches into the active area of the device, thus reducing the length of the active area. The active area must be designed to account for the reduction in length, hence an integrated circuit designer is limited as to how small the semiconductor chip can be made. If the amount of encroachment could be reduced, the chip could be smaller in size, thus reducing the cost of manufacturing.
It is known that the presence of a dopant impurity in a semiconductor material, as well as the temperature, pressure, and ambient gases, affect the growth rate of the oxide. The presence of an impurity will enhance or retard the oxidation rate through two mechanisms. The concentration of the impurity and/or the damage caused to the lattice when the impurity is implanted may affect the growth rate of the oxide. Studies have found that boron, aluminum, phosphorus, arsenic, and antimony enhance the oxide growth rate, while germanium, silicon, and gallium retard the oxide growth rate.
A method disclosed in U.S. Pat. No. 4,170,492, issued to Bartlett et al on Oct. 9, 1979, takes advantage of unannealed implant damage to enhance oxidation in the field regions. A silicon nitride mask is still used to prevent oxide growth in the active areas. The enhanced growth of oxide in the damaged regions allows less time for the oxide to grow underneath the silicon nitride mask, thus reducing the amount of oxide encroaching into the active area of the circuit. However, if one were able to form the field oxide without the use of the silicon nitride mask, it would greatly reduce and simplify the number of processing steps, thus reducing the total cost of manufacturing.
By now it should be appreciated that it would be advantageous to provide a process for forming a field oxide region which not only reduces and simplifies the processing steps, but also reduces the amount of contamination, thus reducing the cost and improving the yield. In addition, a process which also allows for the reduction in area consumed by the inactive, field regions of the device is desirable.
Accordingly, it is an object of the present invention to provide an improved method for obtaining a field oxide.
Another object of the present invention is to provide a process for obtaining a field oxide without using silicon nitride, or other hard masks, thus reducing the amount of contamination.
A further object of the present invention is to provide a process for obtaining a field oxide with a reduced number of processing steps.
Yet another object of the present invention is to provide a process for obtaining a field oxide region which reduces the amount of encroachment int the active area, thus enabling a reduction in overall size of a semiconductor chip.